About

The emerging new interest in artificial intelligence (AI) has led to a paradigm shift in the field of computer architecture. Architectures that focus on machine learning and neuromorphic computing are increasingly being adopted into the mainstream. The design of future processors is increasingly being predicated on metrics based on cognitive applications. The interplay between the development of state-of-the-art algorithms in cognitive sciences, computer vision, speech recognition and the design of the underlying system architectures has resulted in several cross-disciplinary advances. After highly successful editions of the Workshop on Cognitive Architectures in the past, in this year’s edition we expect to consolidate the many recent works in this field and provide concrete roadmaps as to what subsequent directions the research in this field should take. This workshop at HPCA proposes to bring together researchers and practitioners within systems architecture, computer vision, artificial intelligence and robotics to discuss the latest ideas, applications and commercialization strategies around the cognitive computing theme. In addition, it also aims to foster an interest in such emerging fields among industry and academic researchers alike. The primary focus is expected to be on driving towards a better understanding of key cognitive algorithms of interest and the allied architectural support issues.

Of particular interest are application areas of mobile cognition, which may comprise of a distributed swarm of intelligent computing modules. This paradigm is relevant in the context of unmanned aerial vehicles and connected cars. Further, the rising investment by industry in designing IoT (Internet-of-Things) platforms, has resulted in several opportunities to build architectures that support capabilities such as intelligent data exchange and interaction with cloud, pattern matching, data analytics and other cognitive aspects to build truly transformative systems.

Call for Papers

Recent advances in architectures for AI have been instrumental in the development and deployment of autonomous systems, such as self-driving vehicles, and unmanned aerial vehicles. The Tesla FSD and Nvidia Xavier SoC are examples of commercial chips in the autonomous driving space with dedicated hardware units for processing AI algorithms. Next-generation processors in this domain are being envisioned as multi-agent systems that support swarm-based decision-making, as well as intelligent data exchange capabilities amongst each other or with a backing cloud server. The proliferation of mobile computing platforms, Internet-of-Things and cloud support features thereof have opened up exciting new opportunities for such real-time, mobile (distributed or swarm-driven) cognition. The CogArch workshop solicits formative ideas and new product offerings in this general space. Topics of interest include (but are not limited to):

  • Algorithms in support of cognitive reasoning: recognition, intelligent search, diagnosis, inference and informed decision-making.
  • Swarm intelligence and distributed architectural support; brain-inspired and neural computing architectures.
  • Prototype demonstrations of state-of-the-art AI computing systems.
  • Accelerators and micro-architectural support for artificial intelligence.
  • Approaches to reduce training time and enable faster model delivery.
  • Cloud-backed autonomics and mobile cognition: architectural and OS support thereof.
  • Resilient design of distributed (swarm) mobile AI architectures.
  • Reliability and safety considerations, and security against adversarial attacks in mobile AI architectures.
  • Energy efficiency, battery life extension and endurance in mobile AI architectures.
  • Case studies and real-life demonstrations/prototypes in specific application domains: e.g. smart homes, connected cars and UAV-driven commercial services, as well as applications of interest to defense and homeland security.
The workshop shall consist of regular presentations and/or prototype demonstrations by authors of selected submissions. In addition, it will include invited keynotes by eminent researchers from industry and academia as well as interactive panel discussions to kindle further interest in these research topics. Submissions will be reviewed by a workshop Program Committee, in addition to the organizers.

Submitted manuscripts must be in English of up to 2 pages (with same formatting guidelines as main conference) indicating the type of submission: regular presentation or prototype demonstration. Submissions should be sent to submissions@cogarch-workshop.org by December 6th, 2019.
If you have questions regarding submission, please contact us: info@cogarch-workshop.org

Call for Prototype Demonstrations

CogArch will feature a session where researchers can showcase innovative prototype demonstrations or proof-of-concept designs in the cognitive architecture space. Examples of such demonstrations may include (but are not limited to):

  • Custom ASIC or FPGA-based demonstrations of machine learning, cognitive or neuromorphic architectures.
  • Innovative implementations of state-of-the-art cognitive algorithms/applications, and the underlying software-hardware co-design techniques.
  • Demonstration of end-to-end cognitive systems comprising of edge devices backed by a cloud computing infrastructure.
  • Novel designs showcasing the adoption of emerging technologies for the design of cognitive systems.
  • Tools or frameworks to aid analysis, simulation and design of cognitive systems.
Submissions for the demonstration session may be made in the form of a 2-page manuscript highlighting key features and innovations of the prototype demonstration. Proposals accepted for demonstration during the workshop can be accompanied by a poster/short presentation. Authors should explicitly indicate that the submission is for prototype demonstration at submission time.

Important Dates

  • Paper submission deadline: December 6th, 2019
  • Notification of acceptance: January 10th, 2020
  • Workshop date: February 23rd, 2020

Program Committee

  • Vijay Janapa Reddi, Harvard University
  • Augusto Vega, IBM Research
  • Karthik Swaminathan, IBM Research
  • Nandhini Chandramoorthy, IBM Research
  • Alper Buyuktosunoglu, IBM Research
  • Pradip Bose, IBM Research

Paper Submission Deadline
December 6th, 2019

Notification
January 10th, 2020

Workshop date
February 23rd, 2020

Program

To be announced

Organizers

Vijay Janapa Reddi is an Associate Professor of Electrical Engineering at Harvard University. His research interests are in edge computing and IoT systems, specifically in the context of mobile devices and autonomous machines. He holds a Ph.D. degree from Harvard University.

Augusto Vega is a Research Staff Member at IBM T. J. Watson Research Center involved in research and development work in the areas of highly-reliable power-efficient embedded designs, cognitive systems and mobile computing. He holds a Ph.D. degree from Polytechnic University of Catalonia (UPC), Spain.

Karthik Swaminathan is a Research Staff Member at IBM T. J. Watson Research Center. His research interests include power-aware architectures, domain-specific accelerators and emerging device technologies in processor design. He is also interested in architectures for approximate and cognitive computing, particularly in aspects related to their reliability and energy efficiency. He holds a Ph.D. degree from Penn State University.

Nandhini Chandramoorthy is a Research Staff Member at IBM T. J. Watson Research Center involved in Deep Neural Network ASIC design with techniques to improve reliable operation at very low supply voltages, and pre-RTL performance modeling tools for multi-core architectures. She holds a Ph.D. degree from Penn State University.

Alper Buyuktosunoglu is a Research Staff Member at IBM T. J. Watson Research Center. He has been involved in research and development work in support of IBM Power Systems and IBM z Systems in the area of high performance, reliability and power-aware computer architectures. He holds a Ph.D. degree from University of Rochester.

Pradip Bose is a Distinguished Research Staff Member and manager of Efficient and Resilient Systems at IBM T. J. Watson Research Center. He has over thirty-three years of experience at IBM, and was a member of the pioneering RISC super scalar project at IBM (a pre-cursor to the first RS/6000 system product). He holds a Ph.D. degree from University of Illinois at Urbana-Champaign.

Registration

CogArch will be held in conjunction with the 26th International Symposium on High-Performance Computer Architecture (HPCA 2020). Refer to the main venue to continue with the registration process.

Event Location

To be announced