About

The emerging new interest in cognitive computing has led to a paradigm shift in the field of computer architecture. Architectures that focus on machine learning and neuromorphic computing are increasingly being adopted into the mainstream. The design of future processors is increasingly being predicated on metrics based on cognitive applications. The interplay between the development of state-of-the-art algorithms in cognitive sciences, computer vision, speech recognition and the design of the underlying system architectures has resulted in several cross-disciplinary advances. Architectures such as DianNao, presented in ASPLOS 2014 and the subsequent versions, EIE, Minerva and Eyeriss, presented in ISCA 2016, among others, have enabled designers to attain unprecedented levels of performance and power efficiency and scalability in their implementations of various cognitive applications. After highly successful editions of the Workshop on Cognitive Architectures in 2015 and 2016, in this year’s edition we expect to consolidate the many recent works in this field and provide concrete roadmaps as to what subsequent directions the research in this field should take. This workshop proposes to bring together researchers and practitioners within systems architecture, computer vision, artificial intelligence and robotics to discuss the latest ideas, applications and commercialization strategies around the cognitive computing theme. In addition, it also aims to foster an interest into such emerging fields among industry and academic researchers alike. The primary focus is expected to be on driving towards a better understanding of key cognitive algorithms of interest and the allied architectural support issues.

Of particular interest are application areas of mobile cognition, which may comprise of a distributed swarm of ‘intelligent’ computing modules. This paradigm is relevant in the context of unmanned aerial vehicles and connected cars. Further, the rising investment by industry in designing IoT (Internet-of-Things) platforms, has resulted in several opportunities to build architectures that support capabilities such as intelligent data exchange and interaction with cloud, pattern matching, data analytics and other cognitive aspects to build truly transformative systems.

Call for Papers

Recent advances in Cognitive Computing Systems (as evidenced by innovations like Watson from IBM and AlphaGo from Google DeepMind), coupled with neurally-inspired hardware designs (such as the IBM TrueNorth chip and Tensor Processing Units (TPU) from Google), have spawned new research and development activity in machine learning, neuromorphic and other brain-inspired computing models, and architectures for efficient support of complex tasks in computer vision, speech recognition and artificial intelligence. The proliferation of mobile computing platforms, Internet-of-Things and cloud support features thereof have opened up exciting new opportunities for real-time, mobile (distributed or swarm-driven) cognition. This half-day workshop solicits formative ideas and new product offerings in this general space. Topics of interest include (but are not limited to):

  • Algorithms in support of cognitive reasoning: recognition, intelligent search, diagnosis, inference and informed decision-making.
  • Swarm intelligence and distributed architectural support; brain-inspired and neural computing architectures.
  • Prototype demonstrations of state-of-the-art cognitive computing systems.
  • Accelerators and micro-architectural support for cognitive computing.
  • Approaches to reduce training time and enable faster model delivery.
  • Cloud-backed autonomics and mobile cognition: architectural and OS support thereof.
  • Resilient design of distributed (swarm) mobile cognitive architectures.
  • Energy efficiency, battery life extension and endurance in mobile, cognitive architectures.
  • Case studies and real-life demonstrations/prototypes in specific application domains: e.g. Smart homes, connected cars and UAV-driven commercial services, as well as applications of interest to defense and homeland security.
The workshop shall consist of short presentations by authors of selected submissions. In addition, it will include invited keynotes by eminent researchers from industry and academia as well as interactive panel discussions to kindle further interest in these research topics. Submitted papers will be reviewed by a workshop Program Committee, in addition to the organizers. While these peer-reviewed papers will not be published in the main ASPLOS conference proceedings, authors may choose to have their papers be published as part of a special conference proceedings. They will also be invited to submit their work to a special issue of an eminent journal. (Presenters at the 2016 edition of CogArch were invited to submit their work to the IEEE MICRO Special Issue on Cognitive Architectures)

Full paper manuscripts must be in English of up to 6 pages (with same formatting guidelines as main conference). To submit regular papers to the workshop, click here. If you have questions regarding submission, please contact us: info@cogarch-workshop.org

Call for Prototype Demonstrations

This edition of CogArch will feature a session where researchers can showcase innovative prototype demonstrations or proof-of-concept designs in the cognitive architecture space. Examples of such demonstrations may include (but are not limited to):

  • Custom ASIC or FPGA-based demonstrations of machine learning, cognitive or neuromorphic architectures.
  • Innovative implementations of state-of-the-art cognitive algorithms/applications, and the underlying software-hardware co-design techniques.
  • Demonstration of end-to-end cognitive systems comprising of edge devices backed by a cloud computing infrastructure.
  • Novel designs showcasing the adoption of emerging technologies for the design of cognitive systems.
  • Tools or frameworks to aid analysis, simulation and design of cognitive systems.
Submissions for the demonstration session may be made in the form of a 1-page abstract highlighting key features and innovations of the prototype demonstration. Proposals accepted for demonstration during the workshop can be accompanied by a poster/short presentation.

Important Dates

  • Paper submission deadline: February 5th, 2018
  • Demo proposal submission deadline: February 12th, 2018
  • Notification of acceptance: February 19th, 2018
  • Final paper submission: March 12th, 2018
  • Workshop date: March 24th, 2018

Program Committee

  • Karthik Swaminathan, IBM Research
  • Nandhini Chandramoorthy, IBM Research
  • Augusto Vega, IBM Research
  • Alper Buyuktosunoglu, IBM Research
  • Pradip Bose, IBM Research

Paper Submission Deadline
February 5th, 2018

Demo Proposal Submission Deadline
February 12th, 2018

Notification
February 19th, 2018

Final paper submission
March 12th, 2018

Program

Coming soon!

Organizers

Karthik Swaminathan is a researcher at the Efficient and Resilient Systems Group at the IBM T. J. Watson Research Center. His research interests include power-aware architectures, domain-specific accelerators and emerging device technologies in processor design. He is also interested in architectures for approximate and cognitive computing, particularly in aspects related to their reliability and energy efficiency. He holds a Ph.D. degree from Penn State University.

Nandhini Chandramoorthy is a post-doctoral researcher at the Efficient and Resilient Systems Group at the IBM T. J. Watson Research Center. She completed her Ph.D. from The Pennsylvania State University, University Park in 2016. Her dissertation work focused on design of accelerators for computer vision algorithms, and performance modeling of multi-core systems with accelerators. At IBM Research, her work involves Deep Neural Network ASIC design with techniques to improve reliable operation at very low supply voltages, and pre-RTL performance modeling tools for multi-core architectures.

Augusto Vega is a Research Staff Member at IBM T. J. Watson Research Center involved in research and development work in the areas of highly-reliable power-efficient embedded designs, cognitive systems and mobile computing. He holds a Ph.D. degree from Polytechnic University of Catalonia (UPC), Spain.

Alper Buyuktosunoglu is a Research Staff Member in Reliability and Power-Aware Microarchitecture department at IBM T. J. Watson Research Center. He has been involved in research and development work in support of IBM Power Systems and IBM z Systems in the area of high performance, reliability and power-aware computer architectures. He holds a Ph.D. degree from University of Rochester.

Pradip Bose is a Distinguished Research Staff Member and manager of Efficient and Resilient Systems at IBM T. J. Watson Research Center. He has over thirty-three years of experience at IBM, and was a member of the pioneering RISC super scalar project at IBM (a pre-cursor to the first RS/6000 system product). He holds a Ph.D. degree from University of Illinois at Urbana-Champaign.

Registration

CogArch will be held in conjunction with the 23rd ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS 2018). Refer to the main venue to continue with the registration process.

Event Location

Williamsburg Lodge
310 South England Street
Williamsburg, VA 23185

Check main venue site for more information.